Purpose and Objectives: The goal is to provide students with fundamental knowledge in digital systems, focusing on their analysis, specification, operation, design, and implementation. It also aims to provide knowledge in digital design using design automation tools and hardware description languages, along with complementary knowledge of the basic concepts of digital design through a combination of lectures, exercises, and labs.
Learning Outcomes: The course deals with the analysis and design of digital systems. Specifically, it covers number systems, Boolean algebra, and the minimization of logical functions. It includes digital gates, flip-flops, combinational and sequential digital circuits, types of registers, and logical and mathematical digital units. An introduction is given to the hardware description and development language Verilog, as well as to the automation tools for digital design used in the implementation of digital circuits in Very Large Scale Integration (VLSI) circuits.
Course Content: The course is based on the fundamental elements of logic circuit design and has the following main objectives: Introduction to the design of combinational and sequential digital circuits. Use of the hardware description language Verilog for modeling, simulation, and implementation of these circuits. Implementation of digital systems on programmable logic devices (CPLDs and FPGAs). Gaining experience in the full cycle of the design, simulation, and implementation process of digital systems using modern computer tools through laboratory exercises. The following topics/chapters are covered: Number Systems (Digital systems, Binary numbers, Conversion of numbers to other base formats, Complements, Signed binary numbers, Registers, and binary logic). Boolean Algebra(Definitions, basic theorems and properties, Boolean functions, Normal and standard forms, Logic gates, Digital integrated circuits, digital logic families (TTL, ECL, MOS, and complementary MOS-CMOS), levels of integration). Minimization of Logical Functions (Karnaugh map method, Rules for the maps, Karnaugh maps for four and five variables, Simplification of sum-of-products, Implementation with NAND and NOR gates, Don't care conditions, XOR function, and error detection and correction circuits). Combinational Logic (Analysis and design process of combinational circuits, Binary adders and subtractors, Binary multipliers, Size comparators, Encoders/Decoders, Multiplexers). Modern Sequential Logic (Latches and Flip-Flops, Analysis of sequential circuits with clock, Minimization and state encoding, Size comparators, Encoders and Decoders, Design process with Flip-Flops). Registers, Counters, Memories, and Programmable Logic (Registers/Shift registers, Ripple counters, Synchronous counters, Other types of counters, Read-only memory (ROM), Random access memory (RAM), Memory decoding, Error detection and correction, PLA, PAL, Sequential PLDs (SPLD), CPLD, FPGA). Asynchronous Sequential Logic (Analysis process, Circuits with latches, Design process, Minimization of state and flow tables, State encoding to avoid race conditions, Hazards). Hardware Description Languages (HDL) and Design Automation Tools (EDA) (Basic concepts, Verilog for combinational circuits, Verilog for sequential circuits, Register transfer level (RTL) design, Finite state machines (FSM), Top-down analysis and design, Circuit simulation and verification, Logic synthesis, Placement and routing, Technology mapping and element libraries, Fully customized integrated circuits (full-custom), Semi-custom standard cells, and gate-array integrated circuits).